Selection of on-going and recently completed projects

  • High-Efficiency Power Management ASICs for Automotive

Several ASICs are being developed, from LDO with very low quiescent current to high-efficiency DC-DC converters. They have to meet the tough requirements of automotive applications.

  • Analog Front-End for Automotive Sensors 

The aim is to develop an integrated low-noise analog front-end able to acquire and process signals provided by Hall sensors in harsh automotive environments.

  • ASICs for biomedical applications such as wearable health monitors

The first objective is to develop an autonomous portable/wearable device, which can establish wireless connection to a base-station, for health or activity related parameter monitoring. Energy harvesting and wireless power transfer is a major feature of this device.

  • Statistical analysis for yield improvement

This project contribute into finding efficient design of experiments and developing methods that obtain more insight on the impact and interaction of various parameters effecting complex systems.

  • High-performance acoustic equalisers and personalised hearing aids

The new design methodologies being developed for the design of acoustic equalisers include modelling of acoustic enclosures and optimized synthesis of digital filters based on genetic algorithms. New approaches are also being used to design personalized hearing aids, starting from a patient’s audiogram.

  • Digitally-Intensive Frequency Synthesizer

The aim of this research is to develop frequency synthesizers able to overcome some of the constrains associated with the standard PLL-based architecture, such as the lock time versus spur rejection and phased noise tradeoff.  The target application is UWB transceivers employed in location.

  • Compensation of I/Q Imbalance in Wideband Quadrature Receivers 
The development of multi-standard receiver architecture is a great challenge for the radio frequency circuit designers, whose task is to provide architectures capable of receiving various signals with different center frequency, bandwidth, guard interval, etc. Latest solutions embrace the direct conversion (Zero-IF) and Low-IF receivers, both type operating with quadrature signals. The development of this kind of architectures is impeded by system and circuit non-idealities, one of them being the imbalance between in-phase and quadrature (I/Q) signals. The I/Q imbalance is caused mainly by the mismatch in the local oscillator’s quadrature signals, gain and phase mismatched of filters on the I/Q path and electromagnetic cross-talk between the I/Q paths. Traditionally the I/Q imbalance is considered to be frequency independent in the case of narrowband signals (GSM, FM receivers). For the new wireless standards the bandwidth is often large (over 1MHz) and the frequency dependence of I/Q imbalance should be taken into account. The latest wireless communication standards adopted the OFDM scheme. The OFDM receivers uses the frame structure to compensate the I/Q imbalance and other impediments. The motivation: I/Q imbalance is due to circuit non-idealities; it would be useful to have a compensation without knowing the modulation type applied in wireless communications. This could be a leap in the development of a universal receiver.
  • Re-configurable & Programmable functional blocks for Baseband Signal Processing in multi-standard radio receivers

This research direction explores new design methods of multi-standard integrated radio receivers for OFDM signals, in order to find new solutions and/or improve the ones currently in use. It comprises three aspects:

  1. Development of new tools for system-level analysis and design of radio receivers for OFDM signals that will support the optimization of the way the signal path is split between the analog and digital domains
  2. Development of new, flexible solutions for the topology of main analog blocks, such as the channel filter, with the view of creating re-configurable circuits
  3. Proposals of new transistor-level circuits for the analog blocks above, tailored for nanometer CMOS implementation and co-existence with large digital blocks within a SoC

This topic was supported by the Romanian National Council for Academic Research (CNCSIS) through the research grant ID_2534, within the "Ideas" framework. Project page.

  • Intelligent solar harvesters for low- and medium power applications
Development of a mixed-signal SoCs that implement “smart” energy harvesters and processors, that combine state-of-the-art analog circuitry with the power of digital control. Main goals are:
  1. Optimized energy harvesting over a wide range of input voltages and able to handle various energy sources, such as single-cell solar panels and fuel cells.
  2. Implementation of digital true MPPT algorithms, with the ability to adjust dynamically the control algorithm to operating conditions
  3. Efficient power transfer to a variety of loads, from re-chargeable batteries to super-capacitors